1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device. More particularly, this invention relates to a nonvolatile semiconductor memory device including MOS transistors each having a floating gate and a control gate.
2. Description of the Related Art
Nonvolatile semiconductor memories, including NOR flash memories and NAND flash memories, have been widely used.
In recent years, a flash memory combining the best features of a NOR flash memory and a NAND flash memory has been proposed in, for example, Wei-Hua Liu, “A 2-Transistor Source-select (2TS) Flash EEPROM for 1.8-V-Only Application,” Non-Volatile Semiconductor Memory Workshop 4.1, 1997. This flash memory has memory cells, each including two MOS transistors. In such a memory cell, one MOS transistor functioning as a nonvolatile memory section has a structure including a control gate and a floating gate and is connected to a bit line. The other MOS transistor, which is connected to a source line, is used to select a memory cell.
With the conventional flash memory, however, the characteristic of the capacitor in the boosting circuit differs from that of the memory cell. This makes it necessary to check the reliability of the memory cell and that of the capacitor in the boosting circuit in separate processes. As a result, the manufacturing processes tend to be complicated.